>Intel core is 25% bigger than a Zen core
>on a denser and electrostatically superior process
>around 20% less efficient
>is only 10% superior in IPC, even less if you tackle on their server DRAM controller instead of client one
Why is Intel so incompetent at core design? AMD market cap =12 billion, Intel market cap = 240 billion.
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You don't need to be competent if you can just bribe OEMs and reviewers.
>2013
okay :)
>while AMD’s L2 is bigger, the fin pitch is larger, the metal pitch is larger, and its SRAM cells are larger, the quad core design on 14nm GloFo is smaller than 14nm Intel. This is practically due to the way the Zen cores are designed vs. Intel cores – the simple explanation is that the Intel cores have wider execution ports (such as processing a 256-bit vector in one micro-op rather than two) and, we suspect, a larger area dedicated to pre-fetch logic. There’s also the consideration of dark silicon, to help assist the thermal environment around the logic units, which is undisclosed.
>I mention this because one of AMD’s goals, aside from the main one of 40%+ IPC, is to have small cores. As a result, as we’ll see in this review, various trade-offs are made. Rather than dedicating a larger die area to execution ports that support AVX in one go, AMD decided to use 2x128-bit vector support (as 1x256) but increase the size of the L2 cache. A larger L2 will ensure fewer cache misses in varied code, perhaps at the expense of high-end compute which can take advantage of larger vectors. The larger L2 will help with single thread performance (all other factors being equal), and AMD knows that Intel’s cache is high performance, so we will see other trade-offs like this in the design. This is obviously combined with AMD’s recent work on having high-density libraries for cache and compute.
7nm GloFo and Intel 10nm comes close to tripling density over 14nm, those cores can be brought down to Atom core sizes.
Or they can be denser, do AMD and Intel disclose core xtor count ?
Intel has started to release less and less information to media, I think they're still doing transistor counts, but who knows for the next generation.
AMD still releases transistor counts, the Zeppelin die is north of 4.8 billion.
The die is a lot more than just cores, we used to know how much transistors a core has, not anymore.
My mistake, I didn't have my glasses on and thought you were interested in total transistor count.
bump
Whats to bump?
Intel and AMD are both designing their cores in different ways, both have their ups and downs.
>2018
read nigger read
>electrostatically
Stop moron, you don't know physics or what it means.
You may have meant e-beam lithography, poor brainlet
No, he clearly meant the electrostatic characteristics of the transistors on the given process. He used the term correctly.
You don't need to be competent when you own 90% of the market
Zen looks like someone shat a shit and made it, look at Skylake is clean and sharp, no sthitty puddles like in Zen
You guys shouldn't be making fun of intel. They're very insecure.
Brain damage.
I wish people would stop perpetuating the assumption that a piece of technology is the sum of its investment and not the engineering that went into it. Throwing money at something doesn't make anything happen, it just gives people more access to tools that enable their jobs, not make them better at it.
But the thread should have ended here , Intel and AMD don't clone each other's chips, they take different markets, considerations and goals into account, pursuing different strategies to satisfy them as they have done for almost 30 years now.
There is no excuse for Intel letting AMD catch up after spending around 10 billion in R&D every year for the last 5.
They let AMD catch up because they pocketed that 10 billion & per year by not doing any R&D. Why bother, when you are 5 generations ahead?
Then, 5 generations later, Zen came out and caught up.
You could have said the same about AMD when Core 2 came out. Who cares? Moore's Law is dead.
Intel publicly discloses R&D spending and each year since 2012 it has been going up regardless of AMD, now they do more than just CPUs but x86 is literally 90% of their revenue so how much money can go elsewhere besides fabs?
What have they got to show for all that money spent?
You're assuming they're spending that money on improvements for consumer workloads.
When in reality they were dumping money into AVX-512 and other shit that is useless for the average person, but has tons of advantage for specialized tasks.
Do they break down the R&D figures into things like CPUs, NAND flash, 3D-Xpoint, and FPGAs?
Sky/Kaby/Coffee-Lake are all Hillsboro, OR designed parts.
Haifa bois in Israel did Haswell and have since been working on Intel's 'Next Generation' architecture'
You mean the Hillbillies and Texans are insecure.
Haifa bois know they're the top shit and once again they'll have to save Intel.
You got it backawards, Haswell (or anything that contains FIVR for that matter) is Hillsboro.
Skylake is jeebois.
Kaby lake was Haifa
>The microarchitecture was developed by Intel's R&D center in Haifa, Israel.
en.wikichip.org
Haifa boys are only good at adding more duct tape to P6.
Skylake was also Haifa.
P6, NetBurst, Nehalem and Haswell are Hillsboro.
Banias, Dothan, Yonah, Conroe, Sandy and Skylake are da joos.
And direct shrinks are random.
muh AVX2
Haswell and Nehalem were Haifa.
Original Nehalem (successor to Tejas) was Hillsboro and cancelled.
Hillbillies can't into good design. Literally worse than AMD Commiefornians.
AVX units are not even that fucking big.
Godamn Icelake vs Zen2 will be a bloodbath, the ultimate and last uarch iteration of Core vs complete Zen
No no, Nehalem and Haswell are definitely Hillsboro.
The "Nehalem" you implied was Cedar Mill.
And yes, jesbois suck absolute cock at anything but adding more duct tape to P6.
That's all they did actually.
but they have to double the size of a lot of busses and registers to make it work
Guess that's why Zen doesn't do AVX-512
>AMD Commiefornians
You mean Bostonians?
AMD doesn't come close to penny-pinching on silicon budget as Intel so we might actually see quite the monster of a core regardless of the super dense process.
At this point it's gonna be a hurdle to actually cool these things, we're getting more thermally limited every shrink.
How is it fucking acceptable that a tiny ULV chip goes up to 90C? what the fuck, stop trying to rely on tiny copper and OEMs to cool your shit and start investing into in-package cooling.
Original Cedarmill was Tejas fuckboi.
Cedar Mill is just a recycle name for die shrink Prescott.
Face it.
Haifa > Gommies > Hillbillies > Texans
No, it's the Alpha team (that got salvaged by AMD) > ARM bois > Hillsboro hyperbibeliners > da joos > the rest.
How do ARM chips manage to keep cool in even worse thermal conditions?
By being narrow and low clocked?
Look at core-M, they're not exactly pushing any frequency records but they're still hot as fuck.
As for being narrow, you have Samsung M3 and Apple's shit, which are not narrow but I seriously doubt either of them run over 50C in a phone.
I'll only laugh because you left out the Texans.
They really were that terrible - I guess we can both agree on that.
The wide ARM cores in phones throttle in mere seconds.
It's race to idle but xXxtremexXx.
GTFO poo-in-loo
ARM chips for starters have better power management and secondly they have way less cache, especially the LLC, secondly I don't know if this is still the case but x86 decode stage has been extremely power intensive since forever, thirdly it's just a matter of market focus, if Intel tried making a phone core it would be far less dense.
>implying market cap is in any way correlated to cpu efficiency rather than decades of strong arm tactics by intel to monopolize themselves
extremely limited tasks.
intel has always sucked dick at making x86 cpus, the only reason they are still around is suing people who were their betters and paying people to not use their betters componentes.
the fact amd weathered it and is still alive, and now back is a miracle.
Who cares if they're the ones buying those $10,000 xeon monsters that fund the rest of the product stack?
got a link to the xeon breakdown for what goes where?
as for the xeon, its supports it, kind of
even their icelake which will support most of it misses out, nothing intel makes fully supports with some of the shit it can do relegated to phi/landing/mill cpus.
>that piledriver die size
holy kek bulldozer was a trainwreck
it's 32nm and it includes L2 cache where none of the other cores do, and technically it is 2 cores in the module.
L2 is pretty tightly integrated into modern core designs these days. For skylake and haswell, the L2 blocks are to the top-left of their images.
This has got to be bait, right?
> IPC
Do gross differences in IPC matter anymore, even for the same underlying ISA? I'd have thought it'd be more complicated than that because of the differences in microarchitecture and implementation...
That AMD core looks almost fungal.
My dude, Nehalem was definitely Haifa. Nehalem means rivers in hebrew.
t. former Intel Haifa employee
>vector operations
>on the CPU
yikes
Its named after Nehalem river in Oregon you jewish cretin.
Hey, that's what I was told when I worked there. Either Nehalem or Banias, both were before my time.
How am I supposed to know there's a river called Nehalem in Oregon? Stupid burger
>2008 architecture vs 2017 architecture
Gee, I wonder why the old one is so shit.
/thread
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This baffles me
I like Intel colors more so I'll go with them.
I have ISSCC presentations saved somewhere, but I can't remember where I saved all the info for Bulldozer and Piledriver. I do have 28nm Steamroller and Excavator handy though.
Steamroller in Kaveri is 18.61mm2 on the 28nm SHP process. That is excluding the L2.
Excavator which is fabbed on a generic 28nm HP process but utilizes higher density transistor libraries brings the module size down to 14.48mm2.
If you were to magically divide the module into single cores then you're looking at an individual 28nm core of 9.3mm2 or 7.24mm2.
This can give you a sense of just how small these cores actually are. If you took these full modules and scaled them down to 14nm you'd see that a single Zen core for example is considerably later than a full Steamroller or Excavator module.
Its kind of impressive that AMD managed to get any appreciable amount of performance out of such tiny narrow cores. They were pretty sparse on the front end and execution logic.
Corrected comparison: i.imgur.com